My research interests are focused on embedded systems and hardware and software co synthesis. During the previous years, I had been involved in implementing multimedia algorithms in embedded systems, targeting low power consumption while retaining a high performance. Towards this goal, I have researched methodologies to design custom memory hierarchies, exploiting them using high level algorithmic transformations. Also, I have investigated the implementation of IP cores at the circuit level, based on the non-conventional residue number system (RNS). Currently, I am working on (a) implementing high level multimedia algorithms in VHDL (IP Cores) and interfacing them with popular soft-cores (like microblaze or picoblaze), and (b) on evaluating the Data Reuse methodology of motion estimation algorithms, that I have been working on during the previous years, on multicore machines.