Binary to Residue Number System VHDL Generator

Number of input bits and moduli number vector2 (anonyomous users are restricted to 16bits and modulo 1-17):

input bits:


Number of Test Vectors to generate:

Create VHDL, Dot file & Schematic
Create VHDL only

SubTool: Locate the best moduli set for a given maximum input number

Maximum input:

Input is given in maximum decimal value
Input is given in maximum number of bits value
Maximum available difference in moduli bitwidths (0-..):

Number of modulis for our set: